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Timing Analysis for Complex Digital Gates and Circuits Accounting for Transistor Degradation
Authors
 Gavrilov S.V.
 Gudkova O.N.
 Soloviev Roman
Date of publication
 2013
Type of work
 ñòàòüÿ â íàó÷íîì æóðíàëå
Library reference
 Gavrilov S.V., Gudkova O.N., Soloviev Roman Timing Analysis for Complex Digital Gates and Circuits Accounting for Transistor Degradation. Proceedings of SEUA. Series “Information technologies, Electronics, Radio engineering”. March 2013. Issue 16. P. 84-93.
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